Publications | Yuzhe Ma

Papers

2022

[J19] A GPU-enabled Level Set Method for Mask Optimization

Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022.

[J18] PTPT: Physical Design Tool Parameter Tuning via Multi-Objective Bayesian Optimization

Hao Geng, Tinghuan Chen, Yuzhe Ma, Binwu Zhu, Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022.

[J17] Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique

Xiaodong Wang, Changhao Yan, Yuzhe Ma, Bei Yu, Fan Yang, Dian Zhou, Xuan Zeng

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022.

[J16] Adaptive Layout Decomposition with Graph Embedding Neural Networks

Wei Li, Yuzhe Ma, Yibo Lin, Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022.

2021

[J15] DAMO: Deep Agile Mask Optimization for Full Chip Scale

Guojin Chen, Wanli Chen, Qi Sun, Yuzhe Ma, Haoyu Yang, Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021.

[J14] High-Speed Adder Design Space Exploration via Graph Neural Processes

Hao Geng, Yuzhe Ma, Qi Xu, Jin Miao, Subhendu Roy, Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021.

[J13] Neural-ILT 2.0: Migrating ILT to Domain-specific and Multi-task-enabled Neural Network

Bentian Jiang, Lixin Liu, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021.

[J12] Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization

Wei Zhong, Shuxiang Hu, Yuzhe Ma, Haoyu Yang, Xiuyuan Ma, Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021.

[J11] OpenMPL: An Open-Source Layout Decomposer

Wei Li, Yuzhe Ma, Qi Sun, Lu Zhang, Yibo Lin, Iris Hui-Ru Jiang, Bei Yu, David Z. Pan

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021.

[J10] Machine Learning for Electronic Design Automation: A Survey

Guyue Huang, Jingbo Hu, Yifan He, Jialong Liu, Mingyuan Ma, Zhaoyang Shen, Juejian Wu, Yuanfan Xu, Hengrui Zhang, Kai Zhong, Xuefei Ning, Yuzhe Ma, Haoyu Yang, Bei Yu, Huazhong Yang, Yu Wang

ACM Transactions on Design Automation of Electronic Systems, 2021.

[J09] VLSI Mask Optimization: From Shallow To Deep Learning

Haoyu Yang, Wei Zhong, Yuzhe Ma, Hao Geng, Ran Chen, Wanli Chen, Bei Yu

Integration, the VLSI Journal, 2021.

[C25] BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework

William J. McCalla Best Paper Award

Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D.F. Wong

IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2021.

[C24] DevelSet: Deep Neural Level Set for Instant Mask Optimization

Guojin Chen, Ziyang Yu, Hongduo Liu, Yuzhe Ma, Bei Yu

IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2021.

[C23] NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis

Junzhe Cai, Changhao Yan, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng

ACM/IEEE Design Automation Conference (DAC) Dec, 2021.

[C22] A GPU-enabled Level-Set Method for Mask Optimization

Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu

IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Feb. 2021.

[C21] Physical Synthesis for Advanced Neural Network Processors

Invited Paper

Zhuolun He, Peiyu Liao, Siting Liu, Yuzhe Ma, Bei Yu

IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 2021.

[C20] TreeNet: Deep Point Cloud Embedding for Routing Tree Construction

Best Paper Award

Wei Li, Yuxiao Qu, Gengjie Chen, Yuzhe Ma, Bei Yu

IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 2021.

2020

[J08] Adversarial Perturbation Attacks on ML-based CAD: A Case Study on CNN-based Lithographic Hotspot Detection

Kang Liu, Haoyu Yang, Yuzhe Ma, Benjamin Tan, Bei Yu, Evangeline F. Y. Young, Ramesh Karri, Siddharth Garg

ACM Transactions on Design Automation of Electronic Systems, 2020.

[J07] A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization

Yuzhe Ma, Wei Zhong, Shuxiang Hu, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020.

[J06] SRAF Insertion via Supervised Dictionary Learning

Hao Geng, Wei Zhong, Haoyu Yang, Yuzhe Ma, Joydeep Mitra, Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020.

[J05] GAN-OPC: Mask Optimization with Lithography-guided Generative Adversarial Nets

Haoyu Yang, Shuhe Li, Zihao Deng, Yuzhe Ma, Bei Yu, and Evangeline F. Y. Young

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020.

[C19] Reinforcement Learning Driven Physical Synthesis

Invited Paper

Zhuolun He, Lu Zhang, Peiyu Liao, Yuzhe Ma, Bei Yu

IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Nov. 2020.

[C18] DAMO: Deep Agile Mask Optimization for Full Chip Scale

Guojin Chen, Wanli Chen, Yuzhe Ma, Haoyu Yang, Bei Yu

IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov, 2020.

[C17] Neural-ILT: Migrating ILT to Nerual Networks for Mask Printability and Complexity Co-optimizaton

Bentian Jiang, Lixin Liu, Yuzhe Ma, Hang Zhang, Evangeline F. Y. Young, Bei Yu

IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov, 2020.

[C16] Learn to Floorplan through Acquisition of Effective Local Search Heuristics

Zhuolun He, Yuzhe Ma, Lu Zhang, Peiyu Liao, Ngai Wong, Bei Yu, Martin D. F. Wong

IEEE International Conference on Computer Design (ICCD), Oct. 2020.

[C15] Adaptive Layout Decomposition with Graph Embedding Neural Networks

Wei Li, Jialu Xia, Yuzhe Ma, Jialu Li, Yibo Lin, Bei Yu

ACM/IEEE Design Automation Conference (DAC), July, 2020.

[C14] Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization

Wei Zhong, Shuxiang Hu, Yuzhe Ma, Haoyu Yang, Xiuyuan Ma, Bei Yu

ACM/IEEE Design Automation Conference (DAC), July, 2020.

[C13] Understanding Graphs in EDA: From Shallow to Deep Learning

Invited Paper

Yuzhe Ma, Zhuolun He, Wei Li, Lu Zhang, Bei Yu

ACM International Symposium on Physical Design (ISPD), Mar. 2020.

[C12] VLSI Mask Optimization: From Shallow To Deep Learning

Invited Paper

Haoyu Yang, Wei Zhong, Yuzhe Ma, Hao Geng, Ran Chen, Wanli Chen, Bei Yu

IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 2020.

2019

[J04] Cross-layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach

Yuzhe Ma, Subhendu Roy, Jin Miao, Jiamin Chen, Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019.

[J03] Layout Hotspot Detection with Feature Tensor Generation and Deep Biased Learning

Haoyu Yang, Jing Su, Yi Zou, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019.

[J02] Recent Advances in Convolutional Neural Network Acceleration

Qianru Zhang, Meng Zhang, Tinghuan Chen, Zhifei Sun, Yuzhe Ma, Bei Yu

Neurocomputing, 2019.

[C11] Congestion-aware Global Routing using Deep Convolutional Generative Adversarial Networks

Zhonghua Zhou, Ziran Zhu, Jianli Chen, Yuzhe Ma, Bei Yu, Tsung-Yi Ho, Guy Lemieux, Andre Ivano

ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Sep. 2019.

[C10] CAD Tool Design Space Exploration via Bayesian Optimization

Yuzhe Ma, Ziyang Yu, Bei Yu

ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Sep. 2019.

[C09] A Unified Approximation Framework for Compressing and Accelerating Deep Neural Networks

Best Student Paper Award

Yuzhe Ma, Ran Chen, Wei Li, Fanhua Shang, Wenjian Yu, Minsik Cho, Bei Yu

IEEE International Conference on Tools with Artificial Intelligence (ICTAI), Nov. 2019.

[C08] OpenMPL: An Open Source Layout Decomposer

Invited Paper

Wei Li, Yuzhe Ma, Qi Sun, Yibo Lin, Iris Hui-Ru Jiang, Bei Yu, David Z. Pan

IEEE International Conference on ASIC (ASICON), Oct. 2019

[C07] High Performance Graph Convolutional Networks with Applications in Testability Analysis

Yuzhe Ma, Haoxing Ren, Brucek Khailany, Harbinder Sikka, Lijuan Luo, Karthikeyan Natarajan, Bei Yu

ACM/IEEE Design Automation Conference (DAC), June 2019.

[C06] SRAF Insertion via Supervised Dictionary Learning

Best Paper Award Nomination

Hao Geng, Haoyu Yang, Yuzhe Ma, Joydeep Mitra, Bei Yu

IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 2019.

2018

[J01] SD-PUF: Spliced Digital Physical Unclonable Function

Jin Miao, Meng Li, Subhendu Roy, Yuzhe Ma and Bei Yu

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018.

[C05] GAN-OPC: Mask Optimization with Lithography-guided Generative Adversarial Nets

Haoyu Yang, Shuhe Li, Yuzhe Ma, Bei Yu, and Evangeline F. Y. Young

ACM/IEEE Design Automation Conference (DAC), June 2018.

2017

[C04] A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization

Yuzhe Ma, Jhih-Rong Gao, Jian Kuang, Jin Miao and Bei Yu

IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2017.

[C03] Clock-Aware UltraScale FPGA Placement with Machine Learning Routability Prediction

Chak-Wa Pui, Gengjie Chen, Yuzhe Ma, Evangeline F. Y. Young and Bei Yu

IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2017.

[C02] Methodologies for Layout Decomposition and Mask Optimization: A Systematic Review

Yuzhe Ma, Xuan Zeng and Bei Yu

IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct. 2017.

[C01] A Learning Bridge from Architectural Synthesis to Physical Design for Exploring Power Efficient High-Performance Adders

Subhendu Roy, Yuzhe Ma, Jin Miao and Bei Yu

IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2017.

Patent

[P01] Deep Learning Testability Analysis with Graph Convolutional Networks

Yuzhe Ma, Haoxing Ren, Brucek Khailany, Harbinder Sikka, Lijuan Luo, Karthikeyan Natarajan

US Patent 10657306, May 2020.

Dissertation

[PHD] Methodologies for Efficient Hardware Design Automation and Hardware-Friendly Learning

Yuzhe Ma

The Chinese University of Hong Kong, July 2020.